DRDO DYSL-QT Pune JRF Recruitment 2026 | Junior Research Fellowship in Quantum Technologies – Apply by 15 July

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Arjun Sharma
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DRDO DYSL-QT Pune JRF Recruitment 2026 | Junior Research Fellowship in Quantum Technologies – Apply by 15 July

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DRDO DYSL-QT JRF Recruitment 2026 – 02 Junior Research Fellow (JRF) Posts | Apply by 15 July 2026

02 Positions | Pune, Maharashtra | DRDO Young Scientist Laboratory – Quantum Technologies (DYSL-QT) | Junior Research Fellowship

Advertisement Details
  • Advertisement No.: 01/2025-26
  • Published Date: 16-06-2026
  • Application Start Date: 16-06-2026
  • Last Date to Apply: 15-07-2026
  • Organization: DRDO Young Scientist Laboratory – Quantum Technologies (DYSL-QT)
  • Location: DIAT Campus, Girinagar, Pune – 411025, Maharashtra
  • Post Name: Junior Research Fellow (JRF – Electronics)
  • Total Vacancies: 02
  • Selection Mode: Interview
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DRDO Young Scientist Laboratory – Quantum Technologies (DYSL-QT), Pune, invites applications from eligible and motivated candidates for the position of Junior Research Fellow (JRF). The laboratory is engaged in cutting-edge research and development in Quantum Computing, Quantum Communication and Quantum Sensing technologies. The fellowship offers an excellent opportunity for young researchers to contribute to advanced national defence technologies.

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About DYSL-QT

DRDO Young Scientist Laboratory – Quantum Technologies (DYSL-QT) is a specialized DRDO laboratory established to carry out advanced research in Quantum Technologies. The laboratory collaborates with premier institutions such as IITs, Central Universities, State Universities and other leading academic institutions for development of futuristic technologies in the fields of quantum computing, communication and sensing.

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Vacancy Details
  • Junior Research Fellow (JRF – Electronics) – 02 Posts
Total Vacancies: 02 Posts

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Educational Qualification

Option 1:
  • B.E./B.Tech in Electronics & Communication Engineering (ECE), Electronics & Telecommunication Engineering (ETE), Electronics & Instrumentation Engineering (EIE), Electronics Engineering, Electrical & Electronics Engineering (EEE) or Electrical Engineering (EE).
  • Must have studied electives covering VLSI Design, Embedded Systems and Digital Signal Processing.
  • First Division in Degree.
  • Valid NET/GATE Qualification.
OR

Option 2:
  • M.E./M.Tech in the above relevant disciplines.
  • Specialization in VLSI Design, Embedded Systems or Digital Signal Processing.
  • First Division at both Graduate and Postgraduate levels.
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Desirable Qualification
  • Knowledge of VERILOG/VHDL.
  • Experience with FPGA Development.
  • Knowledge of Vivado Tools.
  • Knowledge of Vitis IDE.
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Age Limit
  • Maximum Age: 28 Years as on the last date of application.
  • SC/ST Candidates: 05 Years relaxation.
  • OBC (NCL) Candidates: 03 Years relaxation.
  • Age relaxation will be applicable as per Government rules.
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Fellowship & Benefits
  • Monthly Fellowship: ₹37,000/- per month.
  • House Rent Allowance (HRA) as applicable.
  • Initial Tenure: 02 Years.
  • May be extended for an additional 02 Years as per rules.
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Selection Process
  • Application Screening.
  • Shortlisting based on eligibility and academic qualifications.
  • Interview.
  • Document Verification.
  • Final Merit-Based Selection.
Note:
  • Date, time, venue and mode of interview will be communicated to shortlisted candidates through Email and Post.
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Important Dates
  • Advertisement Published Date: 16 June 2026
  • Application Start Date: 16 June 2026
  • Last Date for Receipt of Applications: 15 July 2026
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Documents Required
  • Duly Filled Application Form.
  • Educational Qualification Certificates.
  • Mark Sheets.
  • NET/GATE Qualification Certificate.
  • Experience Certificates (if any).
  • Proof of Date of Birth.
  • CGPA to Percentage Conversion Formula issued by the University/Institute.
  • Self-attested copies of all supporting documents.
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How to Apply
  • Download the application form from the DRDO website.
  • Fill the application form carefully.
  • Attach self-attested copies of all required documents.
  • Send the completed application by post to the Director, DYSL-QT.
  • Candidates may also send a soft copy of the application through Email.
  • The envelope should be superscribed as “Application for JRF”.
Postal Address:

The Director
DRDO Young Scientist Laboratory – Quantum Technology (DYSL-QT)
Defence Research and Development Organisation (DRDO)
Hall No. 1, Ground Floor
Vigyan Upakendra
DIAT Campus, Girinagar
Pune – 411025
Maharashtra

Email ID:

dyslqtdrdo@gmail.com

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Important Instructions
  • Candidates employed in Government/PSU/Autonomous Bodies should apply through proper channel.
  • A No Objection Certificate (NOC) must be produced at the time of interview.
  • The fellowship is purely temporary in nature.
  • The fellowship does not guarantee employment in DRDO.
  • Candidates who have already been awarded JRF in any DRDO laboratory are not eligible to apply again.
  • Incomplete applications are liable to be rejected.
  • Candidates must attach proof of CGPA to Percentage conversion formula.
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Contact Details
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Important Links
  • Official DRDO Website: Visit
  • Advertisement & Application Form: Download
  • Application Mode: Offline / Email
  • Email ID: dyslqtdrdo@gmail.com
  • Job Location: Pune, Maharashtra
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Quick Overview
  • Organization: DRDO DYSL-QT
  • Post Name: Junior Research Fellow (JRF – Electronics)
  • Total Posts: 02
  • Qualification: B.E./B.Tech with NET/GATE or M.E./M.Tech
  • Desirable Skills: VERILOG, VHDL, FPGA, Vivado, Vitis IDE
  • Age Limit: 28 Years
  • Fellowship: ₹37,000/- Per Month + HRA
  • Selection Process: Interview
  • Application Mode: Offline / Email
  • Last Date: 15 July 2026
  • Location: Pune, Maharashtra
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